Bipolar short-circuit fault ride-through method of DC transformer
CSTR:
Author:
Affiliation:

Clc Number:

TM711

Fund Project:

  • Article
  • |
  • Figures
  • |
  • Metrics
  • |
  • Reference
  • |
  • Related
  • |
  • Cited by
  • |
  • Materials
  • |
  • Comments
    Abstract:

    When the DC transformer based on the traditional input series output parallel(ISOP) topology has a bipolar short-circuit fault, the module capacitors discharge quickly if no fault current limiting measures are taken. After the fault is cleared, it must be recovered by complicated timing such as slow start charging failed to fault ride-through. A method based on improved ISOP topology, using fault current blocking and current limiting control to realize system bipolar short-circuit fault ride-through is proposed. Firstly, the three stages and the mathematical models of the DC-voltage electronic transformer based on the improved ISOP topology are analyzed. Then, the low-voltage side fault ride-through method based on fault current limiting principle and the design principle of fault ride-through time are analyzed. Finally, the RTDS is built on the hardware-in-the-loop simulation platform. The results demonstrate the feasibility and effectiveness of the proposed fault traversal method.

    Reference
    Related
    Cited by
Get Citation
Share
Article Metrics
  • Abstract:
  • PDF:
  • HTML:
  • Cited by:
History
  • Received:January 13,2020
  • Revised:February 25,2020
  • Adopted:March 01,2020
  • Online: August 03,2020
  • Published: July 28,2020
Article QR Code